[stella] WIP: Salmon Run: Asymmetrical Playfield
Thom Cherryhomes
thom.cherryhomes at gmail.com
Thu Mar 15 06:21:21 CDT 2007
makes sense, ok.
-Thom
On 3/15/07, SeaGtGruff at aol.com <SeaGtGruff at aol.com> wrote:
>
>
>
> In a message dated 3/14/2007 11:36:37 PM Eastern Daylight Time,
> thom.cherryhomes at gmail.com writes:
> i'm going to try the following approach:
>
> use a set of pointers to read a set of tables, that are 32x4 bytes
> each, read those pointers on each pass of the kernel, and change them
> according to a random counter. since I am using a reflected playfield,
> I'll write them PF0 (which will always be F0), PF1, PF2, PF2, PF1,
> which according to my calculations, leaves enough to stuff data for
> PF0 and PF1 at least.
>
> upon overscan, the scroll counters will be updated as per usual, and
> the kernel will loop again.
>
> -Thom
>
>
> If PF0 is going to be #$F0 all the time, then once you set it to #$F0 just
> before the first line of the playfield (i.e., just after displaying the
> score), you can just leave it alone until the bottom of the playfield (i.e.,
> just before displaying the "salmons remaining")-- there's no need to write
> to it at all during the river kernel. In fact, if you don't mind using PF0
> as a sort of "side border," then you can just set it to #$F0 at the
> beginning of your program and then leave it alone, letting it remain as is
> for the score, river, and lives remaining.
>
> With a reflected playfield, you don't need to write to the PF registers in
> order from left to right-- i.e., you can write to the PF registers "out of
> sequence" depending upon the earliest and latest times that you can update
> them without having an undesired effect:
>
> Left copy of PF1:
>
> First pixel begins at screen position 16
> = color clock 84 (i.e., 68 + 16)
> = machine cycle 28 (i.e., 84 / 3)
> Must be written to no later than machine cycle 27 and 1/3 (i.e., 28 - 2/3)
>
> Left copy of PF1:
> Last pixel begins at screen position 44
> = color clock 112
> = machine cycle 37 and 1/3
> Must not be changed until after machine cycle 36 and 2/3
> Left copy of PF2:
>
>
> First pixel begins at screen position 48
> = color clock 116
> = machine cycle 38 and 2/3
> Must be written to no later than machine cycle 38
>
> Left copy of PF2:
> Last pixel begins at screen position 76
> = color clock 144
> = machine cycle 48
> Must not be changed until after machine cycle 47 and 1/3
>
> Right copy of PF2:
>
> First pixel begins at screen position 80
> = color clock 148
> = machine cycle 49 and 1/3
> Must be written to no later than machine cycle 48 and 2/3
>
> Right copy of PF2:
> Last pixel begins at screen position 108
> = color clock 176
> = machine cycle 58 and 2/3
> Must not be changed until after machine cycle 58
>
> Right copy of PF1:
>
> First pixel begins at screen position 112
> = color clock 180
> = machine cycle 60
> Must be written to no later than machine cycle 59 and 1/3
>
> Right copy of PF1:
> Last pixel begins at screen position 140
> = color clock 208
> = machine cycle 69 and 1/3
> Must not be changed until after machine cycle 68 and 2/3
>
> Of course, the machine instructions take whole cycles, so you have to drop
> any fractional portions. Keeping in mind that you don't want to write to PF1
> (or PF2) for its *right* copy until its *left* copy has finished being
> displayed, and vice versa, this gives you the following windows for updating
> each PF register:
>
> Write to PF1 for the *left* copy:
> Anytime from cycle 69 through cycle 27
>
> Write to PF2 for the *left* copy:
> Anytime from cycle 59 through cycle 38
>
> Write to PF2 for the *right* copy:
> At cycle 48-- no ifs, ands, or buts
>
> Write to PF1 for the *right* copy:
> Anytime from cycle 37 through cycle 59
>
> So you can start writing to the PF registers for a particular scan line
> *before* the previous scan line ends, and you can use the following order
> and times (or other order and times that adhere to the preceding rules):
>
> Write to PF2 for the *left* copy-- on cycle 59 or later
> Write to PF1 for the *left* copy-- on cycle 69 or later
> Write to PF1 for the *right* copy-- on cycle 37 through 59
> Write to PF2 for the *right* copy-- on cycle 48 exactly
>
> This should give you plenty of time to load and store the PF registers, as
> well as the players.
>
> Michael
>
>
>
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