[stella] Earliest safe write to PF1 for asymmetrical playfield?

[Glenn Saunders]

This would explain why I've been able to slice a playfield pixel in the middle.  It's unfortunately one of few parts of the 2600 where machine cycles and pixels don't necessarily line up exactly all the time.

> For any given playfield pixel, you must write to the
> appropriate playfield register at least two-thirds of a
> machine cycle before the pixel begins if you want that
> pixel to display the new value.