[stella] Earliest safe write to PF1 for asymmetrical playfield?

[R Mundschau]

I have noticed some PF1 artifacts when I play Thrust Platinum on my  
7800.  Is that write happening at cycle 37?  Does it need to be cycle  
38 for some 7800 systems?

Rob


On Jul 5, 2008, at 5:08 PM, Thomas Jentzsch wrote:

> Michael wrote:
>> A while back, I created a table for myself that shows the latest
>> cycles at which you can write to the playfield registers, for each
>> playfield pixel (plus the beginning of HBLANK).
>
> Very useful. Thanks!
>
> After the development of Thrust, I had a few people reporting problems
> which are related to PF writes (especially Gemini and some 7800, but).
> It turned out, that they are slightly slower than a original 2600.
> Instead of 2/3 cycles, they delay by 1 whole cycle.
>
> Maybe someone with such hardware can make some tests.
>
> Have fun!
> Thomas
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